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1 ?2018 integrated device technology, inc. june 25, 2018 de sc ript ion the xu devices are low phase noise quartz-based pll oscillators supporting a large range of frequencies and output interface types. these devices are designed to operate at three different power supplies and are available in multiple package sizes as well as temperature grades. with a patented one-time program (otp) allowing for infinite memo ry shelf life, the xu devices can be programmed to generate an output frequency from 16khz to 1500mhz with a resolution as low as 1hz accuracy. the configuration capability of this family of devices allows for fast delivery times for both sample and large production orders. fe a t ure s ? frequency range: 0.016mhz to 1500mhz ? output types: lvds, lvpecl, hcsl, lvcmos ? supply voltage options: 1.8v, 2.5v, or 3.3v ? phase jitter (1.875mhz to 20mhz): 100fs typical ? phase jitter (12khz to 20mhz): 300fs typical ? package options: 5.0 3.2 1.2 mm 7.0 5.0 1.3 mm ? operating temperature: -20c to +70c frequency stability options: 20, 25, 50, or 100 ppm ? operating temperature: -40c to +85c frequency stability options: 25, 50, or 100 ppm ? operating temperature: -40c to +105c frequency stability options: 50 or 100 ppm 12 3 4 5 6 e/d / nc nc / e/d out out2 vdd gnd pin assignm e nt s t a ble 1 . 6 -pin pa c k a ge pin # pin name description 12 3 4 e/d nc out nc vdd gnd t a ble 2 . 4 -pin pa c k a ge pin # pin name description [a] pulled high internally = output enabled. [b] low = output disabled. see ordering information for more details. 1 e/d nc en able/disable [a,b] no connect 2 nc e/d no connect enable/disable [a,b] 3 gnd connect to ground 4o u t o u t p u t 5 out2 complementary output 6v dd supply voltage 1 e/d enable/disable [a,b] 2 gnd connect to ground 3o u t o u t p u t 4v dd supply voltage x u da t a she e t x u fa m ily of low pha se n oise qua rt z-ba se d pll osc illa t ors
2 ?2018 integrated device technology, inc. june 25, 2018 xu datasheet absolut e m a x im um ra t ings stresses above the ratings listed below can cause permanent damage to the device. these ratings, which are standard values for idt commercially rated parts, are stress ratings only. functional operation of the device at these or any other condi tions above th ose indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods can affect product reliability. electrical parameters are guaranteed only over the recommended operating t emperature ra nge. t a ble 3 . absolut e m a x im um ra t ings item rating esd com plia nc e t a ble 4 . esd com plia nc e m e c ha nic a l t e st ing t a ble 5 . m e c ha nic a l t e st ing * parameter test method * msl level does not apply. solde r re flow profile t p 10 seconds max within 5c of 260c peak ramp down not to exceed 6c/s ramp up 3c/s max 120 20 seconds in pre-heating area 50 10 seconds above 225c reflow area 400 seconds max from +25c to 260c peak 25c 160c 180c 225c 260c v dd -0.5 to +5.0v e/d -0.5v to v dd + 0.5v out -0.5v to v dd + 0.5v storage temperature -55c to 125c maximum junction temperature 125c core current 65 ma maximum theta j a ju6 75.9 c/w js6 89.6 c/w theta j b 48.6c/w 54.3 c/w human body model (hbm) 1000v mechanical shock half-sine wave with 0.3ms 3000g. x, y, z each direction 1 time. mec hanical vibration frequency: 10 to 55mhz amplitude: 1.5mm. ? frequency: 55C2000hz peak value: 20g. ? duration time: 4h for each x,y,z axis; total 12hours. high temp operating life (htol) 2000 hours at 125c (under power). hermetic seal gross leak (air leak test). fine leak (helium leak test) he-pressur e: 6kgf/cm2 2 hours.
3 ?2018 integrated device technology, inc. june 25, 2018 xu datasheet dc ele c t ric a l cha ra c t e rist ic s note for all dc electrical characteristics tables: a pull-up resistor from v dd to e/d enables output when pin 1 is left open. t a ble 6 . 3 .3 v i dd dc ele c t ric a l cha ra c t e rist ic s v dd = 3.3v 5%, t a = -20c to +70c; -40c to +85c, -40c to +105c. symbol parameter output type conditions minimum typical maximum units i dd current consumption lvds 0.016mhz to 400mhz. 97 ma 400.000+mhz to 1.5ghz. 122 lvpecl 0.016mhz to 212.5mhz. 115 212.5+mhz to 400mhz. 128 400+mhz to 670mhz. 142 hcsl 0.016mhz to 670mhz. 145 lvcmos 0.016mhz to 62.5mhz. 98 62.5+mhz to 167mhz. 108 t a ble 7 . 2 .5 v i dd dc ele c t ric a l cha ra c t e rist ic s v dd = 2.5v 5%, t a = -20c to +70c; -40c to +85c, -40c to +105c. symbol parameter output type conditions minimum typical maximum units i dd current consumption lvds 0.016mhz to 400mhz. 90 ma 400.000+mhz to 1.35ghz. 103 lvpecl 0.016mhz to 156.25mhz. 102 156.25+mhz to 400mhz. 112 400+mhz to 670mhz. 118 hcsl 0.016mhz to 400mhz. 102 400.000+mhz to 670mhz. 112 lvcmos 0.016mhz to 62.5mhz. 80 62.5+mhz to 125mhz. 85 125+mhz to 167mhz. 92
4 ?2018 integrated device technology, inc. june 25, 2018 xu datasheet t a ble 8 . 1 .8 v i dd dc ele c t ric a l cha ra c t e rist ic s v dd = 3.3v 5%, t a = -20c to +70c; -40c to +85c, -40c to +105c. symbol parameter output type conditions minimum typical maximum units i dd current consumption lvds 0.016mhz to 400mhz. 65 ma 400.000+mhz to 1.0ghz. 72 lvpecl 0.016mhz to 250mhz. 75 250.000+mhz to 670mhz. 97 hcsl 0.016mhz to 400mhz. 68 400.000+mhz to 670mhz. 77 lvcmos 0.016mhz to 125mhz. 58 t a ble 9 . lv ds dc ele c t ric a l cha ra c t e rist ic s v dd = 3.3v, 2.5v, 1.8v 5%, t a = -20c to +70c; -40c to +85c, -40c to +1 05c. below are guaranteed for listed standard frequencies. symbol parameter conditions minimum typical maximum units v od differential output voltage 0.25 0.4 0.5 v v os output offset voltage 1 1.17 1.375 v ih enable/disable input high voltage 70%v dd v il enable/disable input low voltage 30%v dd t a ble 1 0 . lv pecl dc ele c t ric a l cha ra c t e rist ic s v dd = 3.3v, 2.5v, 1.8v 5%, t a = -20c to +70c; -40c to +85c, -40c to +1 05c. below are guaranteed for listed standard frequencies. symbol parameter conditions minimum typical maximum units v oh output high voltage v dd = 3.3v 5%. 1.85 2.3 v v dd = 2.5v 5%. 1.1 1.45 v dd = 1.8v 5%. 0.5 0.8 v ol output low voltage v dd = 3.3v 5%. 1.1 1.65 v dd = 2.5v 5%. 0.35 0.85 v dd = 1.8v 5%. 0 0.25 v ih enable/disable input high voltage 70%v dd v il enable/disable input low voltage 30%v dd
5 ?2018 integrated device technology, inc. june 25, 2018 xu datasheet t a ble 1 1 . h csl dc ele c t ric a l cha ra c t e rist ic s v dd = 3.3v, 2.5v, 1.8v 5%, t a = -20c to +70c; -40c to +85c, -40c to +1 05c. below are guaranteed for listed standard frequencies. symbol parameter conditions minimum typical maximum units v oh output high voltage v dd = 3.3v 5%. 0.6 1.1 v v dd = 2.5v 5%. 0.55 0.95 v dd = 1.8v 5%. 0.45 0.7 v ol output low voltage 0 0.2 v ih enable/disable input high voltage 70%v dd v il enable/disable input low voltage 30%v dd t a ble 1 2 . lv cm os dc ele c t ric a l cha ra c t e rist ic s v dd = 3.3v, 2.5v, 1.8v 5%, t a = -20c to +70c; -40c to +85c, -40c to +1 05c. below are guaranteed for listed standard frequencies. symbol parameter conditions minimum typical maximum units v oh differential output voltage 90%v dd v v ol output offset voltage 10%v dd v ih enable/disable input high voltage 70%v dd v il enable/disable input low voltage 30%v dd
6 ?2018 integrated device technology, inc. june 25, 2018 xu datasheet ac ele c t ric a l cha ra c t e rist ic s t a ble 1 3 . 3 .3 v ac ele c t ric a l cha ra c t e rist ic s v dd = 3.3v 5%, t a = -20c to +70c; -40c to +85c, -40c to +105c. symbol parameter test condition minimum typical maximum units f output frequency range lvds. 0.016 1500 mhz lvpecl, hcsl. 0.016 670 lvcmos. 0.016 167 frequency stability temperature = -20c to +70c. 20 100 ppm temperature = -40c to +85c. 25 100 ppm temperature = -40c to +105c. 50 100 ppm aging (1st year) t a = 25c. 3 aging (10 years) t a = 25c. 10 output load lvds. differential. 100 ? lvpecl. v dd - 2.0v. 50 hcsl. to gnd. 50 lvcmos. to gnd. 15 pf t st start-up time output valid time after v dd meets minimum specified level. 10 ms t r output rise time lvds. 20% to 80% vpk-pk. 275 380 ps lvpecl. 400 hcsl. 330 lvcmos. 10% to 90% v dd. 3n s t f output fall time lvds. 80% to 20% vpk-pk. 275 380 ps lvpecl. 400 hcsl. 330 lvcmos. 90% to 10% v dd. 3n s o dc output clock duty cycle lvds. 45 55 % lvpecl. f out < 312.5mhz. 45 55 f out > 312.5mhz. 40 60 hcsl. 45 55 lvcmos. f out < 62.5mhz. 45 55 f out > 62.5mhz. 40 60 t oe output enable/ disable time 100 ns f jitter phase jitter ? (12khzC20mhz) lvds. 300 400 fsec lvpecl. 300 400 hcsl. 300 400 lvcmos. f out = 100mhz. 300 400
7 ?2018 integrated device technology, inc. june 25, 2018 xu datasheet t a ble 1 4 . 2 .5 v ac ele c t ric a l cha ra c t e rist ic s v dd = 2.5v 5%, t a = -20c to +70c; -40c to +85c, -40c to +105c. symbol parameter test condition minimum typical maximum units f output frequency range lvds. 0.016 1350 mhz lvpecl. 0.75 670 hcsl. 0.016 670 lvcmos. 0.016 167 frequency stability temperature = -20c to +70c. 20 100 ppm temperature = -40c to +85c. 25 100 ppm temperature = -40c to +105c. 50 100 ppm aging (1st year) t a = 25c. 3 aging (10 years) t a = 25c. 10 output load lvds. differential. 100 ? lvpecl. v dd - 2.0v. 50 hcsl. to gnd. 50 lvcmos. to gnd. 15 pf t st start-up time output valid time after v dd meets minimum specified level. 10 ms t r output rise time lvds. 20% to 80% vpk-pk. 300 400 ps lvpecl. 250 630 hcsl. 315 lvcmos. 10% to 90% v dd. 3n s t f output fall time lvds. 80% to 20% vpk-pk. 300 400 ps lvpecl. 360 630 hcsl. 315 lvcmos. 90% to 10% v dd. 3n s o dc output clock duty cycle lvds. 45 55 % lvpecl. f out < 156.25mhz. 45 55 f out < 156.25mhz. 40 60 hcsl. 45 55 lvcmos. f out < 62.5mhz. 45 55 f out > 62.5mhz. 40 60 t oe output enable/ disable time 100 ns f jitter phase jitter ? (12khzC20mhz) lvds. 400 500 fsec lvpecl. 350 500 hcsl. 350 500 lvcmos. f out = 100mhz. 350 500
8 ?2018 integrated device technology, inc. june 25, 2018 xu datasheet t a ble 1 5 . 1 .8 v ac ele c t ric a l cha ra c t e rist ic s v dd = 1.8v 5%, t a = -20c to +70c; -40c to +85c, -40c to +105c. symbol parameter test condition minimum typical maximum units f output frequency range lvds. 0.016 1000 mhz lvpecl, hcsl. 0.016 670 lvcmos. 0.016 125 frequency stability temperature = -20c to +70c. 20 100 ppm temperature = -40c to +85c. 25 100 ppm temperature = -40c to +105c. 50 100 ppm aging (1st year) t a = 25c. 3 aging (10 years) t a = 25c. 10 output load lvds. differential. 100 ? lvpecl, hcsl. to gnd. 50 lvcmos. to gnd. 10 pf t st start-up time output valid time after v dd meets minimum specified level. 10 ms t r output rise time lvds. 20% to 80% vpk-pk. 250 315 ps lvpecl. 250 350 hcsl. 320 lvcmos. 10% to 90% v dd. 5n s t f output fall time lvds. 80% to 20% vpk-pk. 250 315 ps lvpecl. 250 350 hcsl. 320 lvcmos. 90% to 10% v dd. 5n s o dc output clock duty cycle lvds. f out < 156.25mhz. 45 55 % f out < 156.25mhz. 40 60 lvpecl. f out < 312.5mhz. 45 55 f out > 312.5mhz. 40 60 hcsl. 40 60 lvcmos. f out < 62.5mhz. 45 55 f out > 62.5mhz. 40 60 t oe output enable/ disable time 100 ns f jitter phase jitter ? (12khzC20mhz) lvds. 800 1200 fsec lvpecl. 750 1200 hcsl. 100 1200 lvcmos. f out = 100mhz. 800 1200
9 ?2018 integrated device technology, inc. june 25, 2018 xu datasheet notes for all ac electrical characteristics tables: 1 a pull-up resistor from v dd to e/d enables output when pin 1 is left open. 2 installation should include a 0.01 f bypass capacitor placed between vdd and gnd to minimize power supply line noise. 3 stability is inclusive of 25c tolerance, operatin g temperature range, input voltage change, load change, aging, shock and vib ration. 4 standard lvcmos frequencies include 10mhz, 12mhz, 12.288mhz, 16mhz, 20mhz, 24mhz, 24.576mhz, 2 5mhz, 33.333mhz, 40mhz, 48mhz, 50mhz, 100mhz, 125mhz and 156.25mhz. 5 standard differential frequencies include 100mhz, 106.25mhz, 125mhz, 150mhz, 155.52mhz, 156. 25mhz, 200mhz, 212.5mhz, 250mhz, 3 00mhz, 312.5mhz and 400mhz. out put wa ve form s figure 1 . lv ds out put wa ve form s oscillator symmetry output levels/rise time/fall time measurements output 2 output 1 output 2 output 1 v oh v ol v od ? period period t r t f 20% to 80% v os
10 ?2018 integrated device technology, inc. june 25, 2018 xu datasheet figure 2 . lv pecl out put wa ve form s oscillator symmetry rise time/fall time measurements output 2 output 1 output 2 output 1 v oh v ol v oh v ol ? period period t r t f 20% to 80% figure 3 . h csl out put wa ve form s oscillator symmetry rise time/fall time measurements output 2 output 1 output 2 output 1 v oh v ol v oh v ol ? period period t r t f 20% to 80%
11 ?2018 integrated device technology, inc. june 25, 2018 xu datasheet figure 4 . lv cm os out put wa ve form s rise time/fall time measurements on time ? period period 20% to 80% 10% to 90% 0v to v dd 10% to 90% rise time 90% to 10% fall time 20% to 80% rise time 80% to 20% fall time off time ? period 50% v dd oscillator symmetry pa c k a ge out line dra w ings the package outline drawings are appended at the end of this document and are accessible from the links below. the package information is the most current data available. www.idt.com/document/psc/j s6-package-outline-50-x-32-mm-bo dy-11-mm-thick www.idt.com/document/psc/ju6-package-outline-70-x- 50-mm-body-13-mm-thick www.idt.com/document/psc/j s4-package-outline-50-x-32-mm-bo dy-11-mm-thick www.idt.com/document/psc/ju4-package-outline-70-x- 50-mm-body-13-mm-thick
12 ?2018 integrated device technology, inc. june 25, 2018 xu datasheet orde ring i nform a t ion xu family ? and ? asic l output ? type 5 package 3 voltage 5 precision 125.000000 frequency i temperature ? range i: industrial ? range ? C40 ? to ? +85 ? c k: extended ? industrial ? range ? C40 ? to ? +105 ? c x: extended ? commercial ? range ? C20 ? to ? +70 ? c 125.000000 ? listed ? in ? mhz ? to ? 6 ? digits 000.016000 ? mhz ? to ? 999.999999 ? mhz a00.000000 ? to ? a99.999999 1000 ? mhz ? to ? 1099.999 ? mhz b00.000000 ? to ? b99.999999 1100 ? mhz ? to ? 1199.999 ? mhz c00.000000 ? to ? c99.999999 ? 1200 ? mhz ? to ? 1299.999 ? mhz d00.000000 ? to ? d99.999999 1300 ? mhz ? to ? 1399.999 ? mhz e00.000000 ? to ? e99.999999 1400 ? mhz ? to ? 1499.999 ? mhz f00.000000 ? 1500 ? mhz 0: ? 100 ? ppm ? ** 5: 50 ? ppm ? ** 6: ? 25 ? ppm 8: 20 ? ppm ? * 1: 1.8 ? vdc ? 5% 2: ? 2.5 ? vdc ? 5% 3: 3.3 ? vdc ? 5% 5: 5.0 ? x ? 3.2 ? mm 7: ? 7.0 ? x ? 5.0 ? mm h: hcmos ? enable/disable ? pin ? 1 j: hcmos ? enable/disable ? pin ? 2 l: ? lvds ? enable/disable ? pin ? 1 m: ? lvds ? enable/disable ? pin ? 2 p: ? lvpecl ? enable/disable ? pin ? 1 q: ? lvpecl ? enable/disable ? pin ? 2 n: ? hcsl ? enable/disable ? pin ? 1 o: ? hcsl ? enable/disable ? pin ? 2 x: ? xhcmos ? comp ? hcmos ? enable/disable ? pin ? 1 y: ? xhcmos ? comp ? hcmos ? enable/disable ? pin ? 2 xu: ? 400 ? fs ? jitter * ? 20ppm ? for ? x ? ( \ 20c ? to ? +70c) ? only. ** ? 100ppm ? and ? 50ppm ? for ? k ? ( \ 40c ? to ? +105c) ? only.
xu datasheet 13 ?2018 integrated device technology, inc. june 25, 2018 disclaimer integrated device te chnology, inc. (idt) and its aff iliated companies (herein referred to as idt) reserve the right to modify the products and/or specific ations described herein at any time, without notice, at idts sole discretion. performance specifications and operati ng parameters of the described products are det ermined in an independent state and are not guaranteed to perform the same way when installed in customer products. the informati on contained herein is provided without representation or warranty of any kind, whether express or implied, incl uding, but not limited to, the suitability of idt's products for any particular purpose, an implied warran ty of merchantability, or non-infringement of the intellectual p roperty rights of others. this documen t is presented only as a guide and does not convey any license under intellectual propert y rights of idt or any third parties. idt's products are not intended for use in applications involvi ng extreme environmental conditions or in life support systems o r similar devices where the failure or malfunction of an idt product can be rea- sonably expected to significantly affect the health or safety of users. anyone using an idt product in such a manner does so at their own risk, absent an express, written agreement by idt. integrated device technology, idt and the idt logo are trademarks or registered trademarks of idt and its subsidiaries in the united states and other c ountries. other trademarks used herein are the property of idt or their respective third party owners. for datas heet type definitions and a glossary of common terms, visit www.idt.com/go/glossary . integrated device technology , inc. all rights reserved. t e c h support www.idt.com/go/support sa le s 1-800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com/go/sales corpora t e h e a dqua rt e rs 6024 silver creek valley road san jose, ca 95138 usa www.idt.com re vision h ist ory revision date description of change june 25, 2018 ? updated package outline drawings section. november 22, 2017 ? updated theta ja and jb in absolute maximum ratings table. ? added msl statement under mechanical testing table. ? updated ordering information. october 19, 2017 ? updated document title. ? updated features bullets. ? updated absolute maximum ratings and esd compliance tables. ? added -40c to +105c rating to all electrical tables. ? removed phase noise charts. ? updated ordering information table. may 12, 2017 ? reformatted embedded tables. ? removed jitter performance tables and moved the phase jitter (12khzC20mhz) parameter to its respective ac electrical characteristics table. ? updated all output waveform drawings. december 1, 2016 initial release

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